1. Technical Field
The present invention relates, generally, to dual damascene processing and, more particularly, to a method for dual damascene processing using electron beam and ion implantation cure methods for a material having a low dielectric constant.
2. Background Art and Technical Problems
Metallization, which generally refers to the materials, methods and processes of wiring together or interconnecting the component parts of an integrated circuit located on the surface of a wafer, is critical to the operation of semiconductor devices. As shown in FIGS. 1a through 1d, the conventional metallization process for a single layer metal system used in fabricating semiconductor devices first involves contact masking which is the etching of contact holes or "contacts" through all the surface layers on a semiconductor device until contact is made with the active regions of the device as shown in FIG. 1b. Next, as shown in FIG. 1c, a thin layer of the conducting metal is deposited over the entire surface of the device and the unwanted portions of the layer are removed by a conventional photomasking and metal etch procedure. After metal etch, thin lines of the metal known as leads or interconnects cover the surface of the device as depicted in FIG. 1d. Typically, a heat treatment step known as alloying is then performed to ensure good electrical contact between the metal and the surface of the wafer.
As more and more circuit components are placed on the wafer surface, the amount of space available for surface wiring decreases. In order to overcome this problem, advances in semiconductor processing have resulted in multilevel layering and wiring of circuit components. An example of a two level metallization scheme is shown in FIG. 2. In a multilevel metallization scheme, surface components are left partially wired together after a single level metallization process is performed. Next, a dielectric material is deposited on the surface of the device and a masking step is performed which etches contact holes, know as vias, down to the first level metal. The whole process, including the single level metallization process, is then repeated until a final structure is achieved which comprises two or three levels of metal connected to one another. Multi level metal systems are more costly and have lower yields. In addition, planarization of the wafer surface and intermediate layers require greater attention in order to form reliable current carrying interconnects. In order to function as a good surface conductor, a metal will preferably exhibit good current density, good adhesion to the wafer surface, ease of patterning, good electrical contact with the wafer material, high purity, corrosion resistance and long term stability.
In the past, the primary metallization material used in semiconductor fabrication was aluminum due to the leakage and adhesion problems experienced with the use of gold and the high contact resistance with silicon experienced with copper. However, over time, the semiconductor industry has slowly been moving to the use of copper for metallization due to the alloying and electromigration problems that are seen with aluminum. In addition, the industry has been moving to dual damascene processing which involves creating interconnect lines by etching a trench, and a series of contact holes or vias, in a planar dielectric layer and then filling in both with a metal. After filling the trench and via with metal, the metal and dielectric are then planarized by chemical mechanical polishing (CMP). The industry has recently turned to damascene processing in favor of conventional aluminum/silicon dioxide interconnect techniques in that damascene processing eliminates the need for metal etch. Further, since the industry is moving to prefer copper over aluminum for metallization, the damascene process is even more important in that copper is extremely difficult to etch. In addition to eliminating the need for metal etch, damascene processing also eliminates the need for dielectric gap fill. Another advantage to damascene processing is its ability to achieve higher interconnect packing density than conventional metallization methods.
The industry's drive to achieve smaller dimensions for integrated circuits, a reduction in time delays, an increase in on-chip speed, and lower metal resistance, has resulted in the above mentioned trends, namely a switch to copper from aluminum for metallization, a switch to dual damascene processing over conventional metallization techniques, and a move to using materials with a low dielectric constant. However, due to the risks and expenses associated with incorporating all three large scale trends in manufacturing semiconductor devices, many believe that industry competitors will likely implement only one or two of these changes in fabricating semiconductor devices.
Accordingly, there is a need for a method for semiconductor fabrication which incorporates the use of copper and a low dielectric constant material, with dual damascene metallization, to produce reliable semiconductor devices which possess increased density and efficiency without jeopardizing integrity. In addition, there is also a need for a method for dual damascene processing which functions to decrease the cost and complexity of the semiconductor fabrication process while increasing its efficiency and ability to produce reliable semiconductor workpieces.